1. Field
Embodiments disclosed here generally relate to methods of improving metallization for manufacturing semiconductor devices, more particularly, embodiments relate to improved selectivity in cobalt deposition.
2. Description of the Related Art
Copper is the current metal of choice for use in multilevel metallization processes that are crucial to semiconductor device manufacturing. The multilevel interconnects that drive the manufacturing processes require planarization of high aspect ratio apertures including contacts, vias, lines, and other features. Filling the features without creating voids or deforming the feature geometry is more difficult when the features have higher aspect ratios. Reliable formation of interconnects is also more difficult as manufacturers strive to increase circuit density and quality.
As integrated devices becomes smaller and more complex, interconnect dimensions must shrink to accommodate. Smaller interconnects naturally create an increase in current density in those interconnects. As the current density increases with shrinking device geometry scales, improvement in electromigration (EM) is needed. One method to improve EM lifetime is to deposit a selective Cobalt capping on the surface of the copper interconnect before dielectric barrier encapsulation.
The copper interconnects and other features are generally formed in a porous low k dielectric layer, which serves as a barrier between the various features deposited on a substrate. Cobalt deposition on the dielectric layer can decrease the barrier properties of the dielectric layer. As such, selectivity of the cobalt deposition for copper as opposed to the dielectric layer should be continually improved.
Therefore, there is a continuing need for increased selectivity for copper over dielectric regions during cobalt deposition.